The present invention relates to a semiconductor device fabrication method and apparatus.
In the field of recent semiconductor device fabrication, the development of micropatterned, high-density, multilayered interconnections is rapidly advancing as the LSI performance improves. Accordingly, the technique is rapidly improving in each fabrication process.
For example, in a CMP (Chemical Mechanical Polishing) process used in the formation of metal damascene interconnections, high cleaning is necessary in cleaning during or after polishing. This is so because even a slight amount of impurity has a large influence on the yield as micropatterning progresses.
As described above, it is important to increase the level of cleanliness in each process, and advance to the subsequent process without leaving any impurity or residue produced in the preceding process behind.
The cleaning process, however, is complicated because too much importance is attached to the performance and effect of, e.g., a slurry and liquid chemical.
Accordingly, the sizes of attached apparatuses increase, and there is no inexpensive, effective cleaning member which can be easily attached.
For example, patent reference 1 describes the overall arrangement of a CMP apparatus. This apparatus is characterized by cleaning a substrate by supplying ionic water. However, a practical arrangement of this ionic water supply apparatus is as disclosed in FIG. 2 of patent reference 2. That is, the increase in size of the apparatus is unavoidable.    Patent reference 1: Japanese Patent Laid-Open No. 2000-294524    Patent reference 2: Japanese Patent Laid-Open No. 2001-358111
As described above, no conventional apparatus can achieve high cleanliness with a compact, simple arrangement.